“Education is key to reducing barriers to adoption. Having easily accessible information is essential to providing the knowledge and expertise needed to inform the industry and eliminating present misconceptions,” said Horacio Mendez, executive director of the SOI Industry Consortium (right) “ The ongoing creation of chapters for the SOI Implementation Guide represents great teamwork and individual contributions from the companies and academic and R&D organizations within our consortium.”

SOI process technologies have been used to implement high-performance, cutting edge custom designs, such as microprocessors, for several process generations. The benefits of SOI demonstrated by these designs – higher performance, the same or lower power consumption, with the same performance – have made SOI an attractive alternative for more mainstream designs as well.

The SOI Implementation Guide features such subjects as a methodology for comparing bulk and SOI process technologies for design teams investigating its potential benefits. One chapter addresses the partially depleted SOI circuit design advantages,  as in  improved chip performance, lower power consumption, and the design issues raised by the bulk CMOS circuit design community.

Upcoming chapters will cover subjects such as a SOI overview and assessment for analog and mixed signal (as well as six individual chapters on the application of SOI to RF and analog), a SOI cost analysis, FinFets and SOI, SRAM scalability in bulk and SOI, followed by a guide on how to port IP from bulk to SOI.

The SOI Industry Consortium is open to any company, organisation or academic institution with an interest in SOI.  Certain chapters of the Implementation Guide will initially be available to members only; the rest is available to the general public on the consortium’s website.

Source:http:// www.soiconsortium.org