Chris G Van de Walle, (right) professor of materials at UCSB, says carbon atoms in a diamond crystal are arranged in what is known as a “regular array.” It is the defects in the array, missing atoms or impurities and inclusions that give diamonds their qualities, such as coloration.

Van de Walle notes, for example, that  the famous blue hue of the Hope Diamond (or the peach tone of Hortensia) have been known by scientists for years. “It is only within the past few years, however, that the applications for quantum information processing have been realised, and the group of Professor [David] Awschalom has been at the forefront of this research.”

UCSB professor David Awschalom (left) heads the group of researchers involved in the diamond study and corroborated with Van de Walle to take steps in rendering the defective studs useful. Van de Walle said, 

“Professor Awschalom knew of this expertise, and suggested we would collaborate and apply our knowledge about defects for the creative purpose of designing ‘good’ defects, that are useful for quantum information processing.”

Van de Walle said scientists can use the quantum-mechanical properties of an electron that can be bound to the defective diamond to act as qubits. “Quantum computing uses qubits that are continuously variable between zero and one, and hence offer infinitely more possibilities to be manipulated and combined with other qubits to produce a desired computational result.”

As revealed in their PNAS publication, the group primarily focuses on identifying defects in materials which have properties similar to diamonds, but far less expensive, building a road map that has taken interest in materials such as silicon carbide, (SiC) known as moissanite by jewelers and aluminum nitride (AlN).

“To come up with a new type of ‘defect’ that will be as good as, or even better than, the defects in diamond,” Van de Walle said. “That would be an important step to the practical realisation of a quantum computer.”

The perfectly flawed transistor for error prone processors
As the search is on for the perfect defect, developing processors that are naturally error-prone is exactly what a team of researchers from the University of Illinois and the University of California, San Diego are doing with stochastic processors, hardware that is allowed to behave non-deterministically under both stressful and nominal conditions. Error tolerance being provided by either the hardware or the software writes HPCWire.

Relaxing the design and manufacturing constraints, will make it simpler and cheaper to produce volume processors easing voltage scaling and clock frequency restrictions allow significant power savings and performance increases.

The basic assumption for semiconductor devices has always been that the hardware must behave flawlessly. "It's the contract that the hardware provides to the software today," says Rakesh Kumar, (right) a computer scientist at the University of Illinois, Urbana-Champaign and part of the Stochastic Processor Research group there being funded by Intel, DARPA, NSF, and the GigaScale Systems Research Center (GSRC ) consortium.

Stochastic processors have chips that compute correctly, say, 99% of the time, specifically designed to let errors occur under both worst-case and nominal conditions. Compared to a 100% error-free processor, a stochastic implementation requires less manufacturing precision and a lot less power to run.

Kumar's stochastic research group has designed a (left) Niagara processor (an open source processor design developed by Sun Microsystems) that allows for a 1-4% error rate. Based on circuit level simulation with CAD design tools, the researchers determine they could save between 25%-40% on power compared to the default (deterministic) design, pointing to how much traditional processor design is devoted to keeping transistors from throwing off errors.

It also explains why multicore designs introduced another challenge for chipmakers. If two of cores on a quad-core processor run (flawlessly) at 2GHz, one can run at 1.5GHz, and the last core can only run error-free at 1GHz, the chip has to be binned at 1GHz and is money down the drain for the chipmaker who wants to ship a 2GHz product and use some scheme to compensate for variability in the other two cores. Stochastic design would make this possible.

Compensating for variability is not easy. Kumar says error tolerance can be accomplished in hardware or in software. Hardware correction would be the most obvious and most palatable way to ensure correct program execution. But error tolerance in software provides more flexibility.
Kumar says the vision "is that all the errors that are produced get tolerated by the software."

The group's research involves how to write application software that takes into account a non-deterministic processor, a shift in thinking Kumar believes is inevitable. Because hardware variability is going to keep getting worse as process geometries shrink, it will make more sense for programmers to code for non-determinism. The ideal on balance is to employ hardware correction only when it is too onerous to compensate for the errors in software, says Kumar.

"You're not going after one answer, you're going after a good answer."