Now a team from the Electro-Optics Center (EOC) Materials Division at Penn State has produced 100mm diameter graphene wafers, (courtesy) key milestone in the graphene development for next generation high frequency electronic devices as it complies with industry norms.

Using a process called silicon sublimation, EOC researchers David Snyder and Randy Cavalero thermally processed silicon carbide wafers in a physical vapour transport furnace until the silicon migrated away from the surface, leaving behind a layer of carbon that formed into a one- to two-atom-thick film of graphene on the wafer surface.

Achieving 100mm graphene wafers has put the Penn State EOC in a lead position for trickier synthesis of ultra-large graphene and graphene-based devices.

With the support of the Naval Surface Warfare Center, EOC researchers are initially focusing on graphene materials to improve the transistor performance in various RF applications.

According to EOC materials scientist Joshua Robinson, Penn State is developing graphene device processing to enhance graphene transistor performance and has fabricated RF field effect transistors on 100mm graphene wafers.

Another goal is improve  electron mobility of the Si-sublimated wafers to nearer the theoretical limit, some 100x faster than silicon. According to Robinson, that will require improvements in the material quality and device design, but there is significant room for improvements in growth and processing.

In addition to silicon sublimation, EOC researchers Joshua Robinson, Mark Fanton, Brian Weiland, Kathleen Trumbull, and Michael LaBella are developing synthesis and device fabrication of graphene on silicon using a non-sublimation route as a means to achieve wafer diameters exceeding 200mm, a necessity for integrating graphene into the existing semiconductor industry.